Sony announced on January 23, 2012 that it had developed the next generation Back-Illuminated CMOS Image Sensor that is more compact, consumes less power and has higher processing speed.
In conventional image sensors, the back illuminated pixel section and the analog circuits for signal processing are placed on a single chip which is stacked on top of supporting substrate, as shown in the figure above.
In Sony's new sensor, the back illuminated pixel section is stacked over a chip containing the analog circuits section for signal processing that also acts as the supporting substrate.
Image sensor research has so far focused on achieving higher pixel numbers, improved image quality and faster processing speeds. Sony's new sensor additionally strives for more compact sensor size.
Sony's new stacking arrangement facilitates the use of large-scale circuits while keeping overall chip size small. Independent mounting on two different chips enables the pixel section to be specialized for higher image quality while the circuit section can be specialized for higher functionality. In addition, the arrangement facilitates faster signal processing and lower power consumption.
Samples of the new sensor will start shipping from March, 2012.
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